Company patents
SHINKAWA LTD.
SHINKAWA LTD. shows a surprising and sharp decline in patenting across its core semiconductor and manufacturing categories, with Chip-to-Chip Interconnect (Bonding, Bumps) dropping by 59.1% in 2025 and Welding & Soldering by 80.0% in 2025, and all major categories showing a 100.0% decline so far in 2026, indicating a significant shift away from these historically dominant areas (58.3% and 33.3% of its portfolio, respectively).
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
84 US filings (since 2023) · 12 categories · 14 themes
Specialized welding or bonding techniques and apparatuses tailored for joining small-scale electronic components, integrated circuits, or semiconductor wafers, emphasizing precision, miniaturization, and electrical connectivity.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Inspection and testing methods specifically designed for wafers before, during, or after bonding processes, including verification of bonding surfaces, alignment, and defect detection in multi-wafer or stacked die assemblies.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Techniques and apparatus for electrically testing semiconductor devices, integrated circuits, or wafers during manufacturing or post-assembly, including built-in self-test (BIST) and contact reliability assessment.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Methods and systems for identifying anomalies, failures, or impending issues within electric motors or their associated drive and power management circuits, often by monitoring electrical or operational parameters.
Development of novel chemical compositions for fluxes, solders, and filler metals to improve material properties, enhance joint reliability, reduce defects, or meet specific application requirements like high-temperature reflow or specialized material joining.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Methods and structures for integrating and enclosing electronic components into compact, multi-functional modules, often involving embedded components, multi-layer substrates, and electromagnetic shielding for performance and miniaturization.
Methods and devices that determine the position, angle, or distance of an object by detecting changes in magnetic fields or inductive coupling.
Innovations in the physical structure, materials, support mechanisms, and operational monitoring of conveyor belts to improve durability, cleanliness, safety, or specific handling capabilities, including specialized drive mechanisms.
Patents
Showing 1-10 of 157