Company patents
Niterra Co., Ltd.
Niterra Co., Ltd.'s patent strategy reveals a surprising recent surge in semiconductor-related innovation, with "Semiconductor Manufacturing Process" experiencing a +266.7% YoY growth in 2024 and "Electron / Ion Tubes & Discharge" growing by +150.0% in 2025, despite a general decline across most categories so far in 2026. While "Material & Chemical Analysis" remains its largest category at 22.2% of its portfolio, the company appears to be shifting focus away from "Batteries & Fuel Cells," which saw a -100.0% decline in patents so far in 2026.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
216 US filings (since 2023) · 11 categories · 17 themes
Focuses on novel heating elements, power delivery, and thermal management for efficient and controlled aerosol generation. This includes resistive, inductive, and other heating methods, as well as heat distribution and retention.
Ceramic materials and components engineered for specific functional applications, such as electronics, energy storage, wear resistance, or high-temperature heating elements.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Focuses on the design, fabrication, and application of piezoelectric materials and devices for sensing, actuation, or wave generation, including material properties, single crystal growth, and protective layers.
Design and control of plasma processing chambers, including heating, gas delivery, electrode configurations, and magnetic field control for uniform and efficient material processing in semiconductor manufacturing.
Development of memory cells utilizing resistive switching or phase-change materials, including novel material compositions, multi-layered structures, and integration with selector devices like bipolar junction transistors, to achieve non-volatile storage.
Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.
Methods and processes for fabricating ceramic matrix composites (CMCs), including preform creation, infiltration techniques, and densification to form complex shapes with enhanced properties.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Process and equipment for producing solid-state battery cells, including solid electrolyte synthesis (sulfide/oxide/polymer), thin-film deposition, lamination, sintering, dry-electrode fabrication, and stacking under controlled atmosphere.
Manufacturing processes and material compositions for creating electronic circuits on flexible or conformable substrates, enabling novel form factors, enhanced durability, and new applications beyond rigid PCBs.
Slurry compositions and coating processes for battery electrodes, including binder/active-material slurries, surface coating layers, and electrode-to-foil adhesion for cathode and anode.
Methods and structures for integrating and enclosing electronic components into compact, multi-functional modules, often involving embedded components, multi-layer substrates, and electromagnetic shielding for performance and miniaturization.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Protective layers applied to ceramic or composite substrates to enhance resistance against extreme temperatures, corrosion, or erosion in harsh operating environments.
Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Patents
Showing 1-4 of 4
Advanced Etching & Patterning Control